With the progress of display technology, in order to reduce the manufacturing cost and improve the competitiveness, the production lines of the thin-film transistor liquid crystal display (TFT-LCD) manufacturing industry are gradually improved; the requirements on processing technology and control become higher; and electrostatic protection is also a problem to be solved in the high-generation production line. In order to prevent electrostatic breakdown in the manufacturing process, a short-circuit wire or another design is usually added into a panel design, but the designs are only directed towards electrostatic breakdown in the manufacturing process after the formation of circuits. At present, the sizes of glass substrates in the high-generation production line are increasingly increased, and meanwhile charges can be easily accumulated by a bulk metal. Therefore, a common electrode outside a panel area, formed with continuous large-area metal, becomes a common generating source of electrostatic discharge (ESD) in the manufacturing process of a TFT array substrate. As the charges can be easily accumulated by bulk metal, uneven local electric field will be caused in a plasma environment such as a plasma enhanced chemical vapor deposition (PECVD) equipment or in an environment in which rollers of equipment rub against the edges of glass, and hence tips tend to discharge and metals on different layers tend to generate ESD. There is still no sound solution to the defects relevant to this type of electrostatics.
In order to uniformly apply voltage to internal common electrodes of a conventional panel, the metal material for peripheral common electrodes adopts a large-width design without bridge connection. But the defect of such design lies in that: in the case of tip discharge due to local potential difference, the electrostatic energy is large, and hence adverse ESD tends to occur.